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1/20 october 2005 8 constant current output channels adjustable output current through one external resistor open and short line, short to gnd, short to v-led supply error detection serial data in/parallel data out serial out change state on the falling edges of clock output current: 20-120 ma 25 mhz clock freq. description the stp08cdc596 is a monolithic, medium-voltage, low current power 8-bit shift register designed for led panel display. the stp08cdc596 contains a 8-bit serial-in, parallel-out shift register that feeds a 8-bitd-type storage register. in the output stage, eight regulated current sources were designed to provide 15-120ma constant current to drive the leds. the stp08cdc596 contains the built-in error detection feature. the device performs this additional function without any increase of the pin number and any change of the pin function, if compared to the standard device without error detection. consequently, choosing this device does not mean to change the footprint on the board. to perform this functionality mode, the device needs a digital key coming from the microprocessor. the stp08cdc596 is able to detect: open and short on the led line, short to gnd, short to led voltage supply. the data mapping of output channels status detection is provided by a feedback from the serial output to the microprocessor. trough an external resistor, users may adjust the stp08cdc596 output current , controlling the light intensity of leds. the stp08cdc596 g uarantees 16 v output driving capability, allowing users to connect more leds in series. the high clock frequency, 25 mhz, also satisfies the system requirement of high volume data transmission. the device is offered in dip-16, so-16 and tssop-16 packages. the stp08cdc596 is well suitable for traffic display signs where the detection feature is strongly required. table 1: order codes typ e temp. range package comments stp08cdc596b1 -40c to 125c dip-16 25 part per tube STP08CDC596M -40c to 125c so-16 (tube) 50 parts per tube STP08CDC596Mtr -40c to 125c so-16 (tape & reel) 2500 parts per reel stp08cdc596ttr -40c to 125c tssop16 (tape & reel) 2500 parts per reel stp08cdc596 8-bit constant current led sink driver with full output detection so-16 dip-16 tssop16 rev. 2
stp08cdc596 2/20 table 2: current accuracy figure 1: pin connection table 3: pin description table 4: absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi on is not implied. output voltage current accuracy output current between bits between ics 0.7v typ. 3% 10% 20 to 120 ma pin n symbol name and function 1 gnd ground terminal 2 sdi serial data input terminal 3 clk clock input terminal 4 le/dm1 latch input terminal 5-12 out 0-7 output terminal 13 oe /dm2 output enable input terminal (active low) 14 sdo serial data out terminal 15 r-ext constant current programming 16 v dd 5v supply voltage terminal symbol parameter value unit v dd supply voltage 0 to 7 v v o output voltage -0.5 to 16 v i o output current 120 ma v i input voltage -0.4 to v dd +0.4 v i gnd gnd terminal current 980 ma f clk clock frequency 25 mhz t opr operating temperature range -40 to +125 c t stg storage temperature range -55 to +150 c
stp08cdc596 3/20 table 5: thermal data table 6: recommended operating conditions (1) if the device is connected in cascade, it may not be possible achieve the maximum data transfer. please considered the timi ngs carefully. (2) in normal mode the oe /dm2 must remain low at least two clock cycles. table 7: electrical characteristics (v dd =5v, t = 25c, unless otherwise specified.) symbol parameter dip-16 so-16 tssop16 unit r thj-amb thermal resistance junction-ambient 90 125 140 c/w symbol parameter test conditions min. typ. max. unit v dd supply voltage 3.3 5.5 v v o output voltage 16.0 v i o output current outn 15 120 ma i oh output current serial-out +1 ma i ol output current serial-out -1 ma v ih input voltage 0.7v dd v dd +0.3 v v il input voltage -0.3 0.3v dd v t wlat le/dm1 pulse width v dd = 3.0 to 3.6v 10 20 ns t wclk clk pulse width 10 20 ns t wen oe /dm2 pulse width (1) 120 400 ns t setup(d) setup time for data 5 20 ns t hold(d) hold time for data 4 15 ns t setup(l) setup time for latch 8 15 ns f clk clock frequency (2) 25 mhz symbol parameter test conditions min. typ. max. unit v ih input voltage high level 0.7v dd v dd v v il input voltage low level gnd 0.3v dd v i oh output leakage current v oh = 16 v 10 a v ol output voltage (serial-out) i ol = 1ma 0.4 v v oh output voltage (serial-out) i oh = -1ma v dd -0.4v v i ol1 output current v o = 0.7v r ext = 910 ? 18.8 20.9 24.00 ma i ol2 v o = 0.7v r ext = 360 ? 46.00 51.5 56.5 ma ? i ol1 output current error between bit (all output on) v o = 0.7v r ext = 910 ? 2 5 % ? i ol2 v o = 0.7v r ext = 360 ? 1 4 % r sin(up) pull-up resistor 150 300 600 k ? r sin(down) pull-down resistor 100 200 400 k ? i dd(off1) supply current (off) r ext = open out 0 to 7 = off 0.45 0.7 ma i dd(off2) r ext = 910 ? out 0 to 7 = off 3.0 6.0 i dd(off3) r ext = 360 ? out 0 to 7 = off 8.2 12.0 i dd(on1) supply current (on) r ext = 910 ? out 0 to 7 = on 3.1 6.2 i dd(on2) r ext = 360 ? out 0 to 7 = on 8.4 12.8
stp08cdc596 4/20 table 8: switching characteristics (v dd =3.3 to 5.5v, t = 25c, unless otherwise specified.) equivalent circuit of inputs and outputs figure 2: oe /dm2 terminal symbol parameter test conditions min. typ. max. unit t plh1 propagation delay time, clk- outn , le /dm1 = h, oe /dm2 = l v dd = 3 v v ih = v dd v il = gnd c l = 13pf i o = 40ma v l = 3 v r ext = 470 ? r l = 65 ? 180 280 ns t plh2 propagation delay time, le /dm1- outn , oe /dm2 = l 150 280 ns t plh3 propagation delay time, oe /dm2- outn , le /dm1 = h 140 280 ns t plh propagation delay time, clk-sdo 25 35 ns t phl1 propagation delay time, clk- outn , le /dm1 = h, oe /dm2 = l 30 60 ns t phl2 propagation delay time, le /dm1- outn , oe /dm2 = l 30 50 ns t phl3 propagation delay time, oe /dm2- outn , le /dm1 = h 35 70 ns t phl propagation delay time, clk-sdo 30 40 ns t r output rise time 220 ns t f output fall time 20 ns
stp08cdc596 5/20 figure 3: le/dm1 terminal figure 4: clk, sdi terminal figure 5: sdo terminal
stp08cdc596 6/20 figure 6: block diagram figure 7: timing diagram in normal mode the oe /dm2 must remain low at least two clock cycles.
stp08cdc596 7/20 figure 8: clock, serial-in, serial-out figure 9: clock, serial-in, latch, enable, outputs
stp08cdc596 8/20 figure 10: outputs test circuit figure 11: dc characteristic figure 12: ac characteristic
stp08cdc596 9/20 running the detection mode phase one: ?entering in detection mode? from the ?normal mode? condition the device can switch to the ?error detection mode? by a logic sequence on the oe/dm2 and le/dm1 pins as showed in the following table and diagram: table 9: entering in detection truth table figure 13: entering in detection timing diagram after these five clk cycles the device goes into the? error detection mode? and at the 6 th rise front of clk the sdi data are ready for the sampling. phase two: ?error detection? the eight data bits must be set ?1? in order to set on all the outputs during the detection. the data are latched by le/dm1 and after that the outputs are ready for the detection process. when the micro controller switches the oe/dm2 to low, the device drives the leds in order to analyze if an open or short condition has occurred. figure 14: detection diagram clk 1 2 3 4 5 oe/dm2 h l h h h le/dm1 l l l h l
stp08cdc596 10/20 the leds status will be detected al least in 2 microseconds and after this time the micro controller puts oe in high state and the output data detection result will go to the microprocessor via sdo. the detection data format is the same of data in normal mode. as soon as all the detection data bits are available on the serial line, the device may go back to normal mode operation. conditions in order to get a successfully detection condition table 10: detection condition (v dd = 3.3 to 5 v temp. range -40 to 85c) where: i o = the output current programmed by the r ext, i odec = the detected output current in detection mode. figure 15: detection mode sw-1 or sw-3b open line or output short to gnd detected ==> i odec 0.5 x i o no error detected ==> i odec 0.5 x i o sw-2 or sw-3a short on led or short to v-led detected ==> v o 2.4 v no error detected ==> v o 2.2 v
stp08cdc596 11/20 phase three: ?resuming to normal mode? the sequence for re-entering in normal mode is showed in the following table and diagram: table 11: resuming to normal mode timing diagram figure 16: resuming to normal mode timing diagram for proper device operation the "entering in detection" sequence must be follow by a "resume mode" sequence, isn?t possible to insert con - secutive equal sequence. clk 1 2 3 4 5 oe/dm2 h l h h h le/dm1 l l l l l
stp08cdc596 12/20 figure 17: typical output current-r ext resistor figure 18: power dissipation vs temperature package figure 19: typical dropout voltage vs output current figure 20: typical output current vs ? i ol (%)
stp08cdc596 13/20 figure 21: timing example for open and/or short detection
stp08cdc596 14/20 dim. mm. inch min. typ max. min. typ. max. a1 0.51 0.020 b 0.77 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 d 20 0.787 e 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 f 7.1 0.280 i 5.1 0.201 l 3.3 0.130 z 1.27 0.050 plastic dip-16 (0.25) mechanical data p001c
stp08cdc596 15/20 dim. mm. inch min. typ max. min. typ. max. a 1.75 0.068 a1 0.1 0.25 0.004 0.010 a2 1.64 0.063 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 9.8 10 0.385 0.393 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.62 0.024 s8 (max.) so-16 mechanical data 0016020d
stp08cdc596 16/20 dim. mm. inch min. typ max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 d 4.9 5 5.1 0.193 0.197 0.201 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0? 8?0? 8? l 0.45 0.60 0.75 0.018 0.024 0.030 tssop16 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 0080338d
stp08cdc596 17/20 dim. mm. inch min. typ max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 22.4 0.882 ao 6.45 6.65 0.254 0.262 bo 10.3 10.5 0.406 0.414 ko 2.1 2.3 0.082 0.090 po 3.9 4.1 0.153 0.161 p 7.9 8.1 0.311 0.319 tape & reel so-16 mechanical data
stp08cdc596 18/20 dim. mm. inch min. typ max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 22.4 0.882 ao 6.7 6.9 0.264 0.272 bo 5.3 5.5 0.209 0.217 ko 1.6 1.8 0.063 0.071 po 3.9 4.1 0.153 0.161 p 7.9 8.1 0.311 0.319 tape & reel tssop16 mechanical data
stp08cdc596 19/20 table 12: revision history date revision description of changes 15-jun-2005 1 first release. 11-oct-2005 2 minor revision
stp08cdc596 20/20 i nformation furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the con sequence s o f use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is grante d b y implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicatio n are subjec t t o change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics produ cts are no t a uthorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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